NXP Semiconductors /LPC15xx /IOCON /PIO0_22

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Interpret as PIO0_22

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESERVED)RESERVED0 (INPUT_NOT_INVERTED)INV 0 (RESERVED)RESERVED 0 (STANDARD_MODE)I2CMODE 0 (RESERVED)RESERVED 0 (BYPASS_INPUT_FILTER)S_MODE 0 (CMP_PCLK)CLKDIV 0 (RESERVED)RESERVED

I2CMODE=STANDARD_MODE, INV=INPUT_NOT_INVERTED, CLKDIV=CMP_PCLK, S_MODE=BYPASS_INPUT_FILTER

Description

I/O control for open-drain pin PIO0_22. This pin is used for the I2C-bus SCL function.

Fields

RESERVED

Reserved. Only write 0 to these bits.

INV

Invert input

0 (INPUT_NOT_INVERTED): Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).

1 (INPUT_INVERTED_HIGH): Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).

RESERVED

Reserved.

I2CMODE

Selects I2C mode. Select Standard mode (I2CMODE = 00, default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000).

0 (STANDARD_MODE): Standard mode/ Fast-mode I2C.

1 (STANDARD_IO_FUNCTIO): Standard I/O functionality

2 (FAST_MODE_PLUS_I2C): Fast-mode Plus I2C

3 (RESERVED): Reserved.

RESERVED

Reserved.

S_MODE

Digital filter sample mode.

0 (BYPASS_INPUT_FILTER): Bypass input filter.

1 (1_CLOCK_CYCLE): 1 clock cycle. Input pulses shorter than one filter clock are rejected.

2 (2_CLOCK_CYCLES): 2 clock cycles. Input pulses shorter than two filter clocks are rejected.

3 (3_CLOCK_CYCLES): 3 clock cycles. Input pulses shorter than three filter clocks are rejected.

CLKDIV

Select peripheral clock divider for input filter sampling clock IOCONCLKDIV. Value 0x7 is reserved.

0 (CMP_PCLK): CMP_PCLK.

1 (CMP_PCLKDIV2): CMP_PCLK/2.

2 (CMP_PCLKDIV4): CMP_PCLK/4.

3 (CMP_PCLKDIV8): CMP_PCLK/8.

4 (CMP_PCLKDIV16): CMP_PCLK/16.

5 (CMP_PCLKDIV32): CMP_PCLK/32.

6 (CMP_PCLKDIV64): CMP_PCLK/64.

RESERVED

Reserved.

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